QCA DESIGN FOR 4-BIT ASYNCHRONOUS DOWN COUNTER
Quantum Cellular Automata (QCA) is a transistor-less computation model that addresses the problem of device interconnection and density which holds the promise of high speed and fewer sizes compare to the Complementary Metal Oxide Semiconductor (CMOS) design. In this study, the design of 4-bit down asynchronous counter which is the fundamental block of the digital technology using new D-Flip Flops (D-FF) layouts is discussed. This D-FF is designed using majority gates. The FF clock inputs are not driven by the same clock and each FF output depends on the previous output. This design finds its application in nanotechnology fields including medical field to monitor the patient’s activity by utilizing timer based tools. The design of 4-bit down asynchronous counter is simulated in the QCA design tool.
A. Roohi, R.F. DeMara, and N. Khoshavi, Design and evaluation of an ultra-area-efficient fault-tolerant QCA full adder, Microelectronics Journal, Vol.46, No.6, 2015, pp.531-542.
V. Pudi, and K. Sridharan,Low complexity design of ripple carry and Brent–Kung adders in QCA, IEEE Transactions on nanotechnology, Vol.11,No.1, 2015, pp.105-119.
M. Abdullah-Al-Shafi, and A.N. Bahar, Novel binary to gray code converters in QCA with power dissipation analysis, International journal of multimedia and ubiquitous engineering, Vol. 11, No. 8, 2016, pp.379-396.
A. Tambe, S. Bhakre, and S. Kassa, Design and Analysis of (2x1) and (4x1) Multiplexer Circuit in Quantum dot Cellular Automata Approach, International Journal of Innovative Technology and Exploring Engineering, Vol.8, No.6S3, 2011, pp.227-281.
M. Mohammadi, M. Mohammadi, and S. Gorgin, An efficient design of full adder in quantum-dot cellular automata (QCA) technology, Microelectronics journal, Vol.50, 2016, pp.35-43.
M. Momenzadeh, J. Huang, and F. Lombardi, Defect characterization and tolerance of QCA sequential devices and circuits, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2005, pp. 199-207.
J. Huang, M. Momenzadeh, and F. Lombardi, Design of sequential circuits by quantum-dot cellular automata. Microelectronics Journal, 38(4-5), 2007, pp.525-537.
S. Pandey, S. Singh, and S. Wairya, Designing an efficient approach for JK and T flip-flop with power dissipation analysis using QCA, International Journal of VLSI design & Communication Systems Vol.7, No.3, 2016 pp.29-48.
R. Laajimi, A. Ajimi, L. Touil, and A.N. Bahar, A Novel Design for XOR Gate used for Quantum-Dot Cellular Automata (QCA) to Create a Revolution in Nanotechnology Structure, International Journal of Advanced Computer Science and Applications, Vol. 8,No.10, 2017, pp.279-287.
K. Maheshwaran, CMOS Design of Low Power High Speed Hybrid Full Adder, International Journal of MC Square Scientific Research, Vol.8, No.1, 2016, pp.16-22.
S. Alexander, Design And Implementation Of Efficient Reversible Multiplier Using Tanner Eda, International Journal of MC Square Scientific Research, Vol.5, No.1, 2013, pp-15-22.
A. Swapna, and A. Hariprasad, Design of Sequential Circuit Using Quantum-Dot Cellular Automata (QCA), International Journal of Advanced Engineering Research and Science, Vol. 3,No.9, 2016, pp.95-100.
M.M. Abutaleb, Robust and efficient quantum-dot cellular automata synchronous counters, Microelectronics Journal, Vol. 61, 2017, pp.6-14.
J.C. Das, and D. De, Nanocommunication network design using QCA reversible crossbar switch, Nano communication networks, Vol.13, 2017, pp.20-33.
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