Design And Implementation Of Innovative Methodologies And Architectures For Digital Signal Processing On Fpgas

Authors

  • Chetti. Venkateswarlu Assistant Professor, Malla Reddy Engineering College for Women (Autonomous), Hyderabad,Telangana
  • Dr. Tipparti. Anil Kumar Professor & Principal ,Jyothishmathi Institute of Technology and Science,(Autonomous), Karimnagar,Telangana

DOI:

https://doi.org/10.29284/m5twa304

Keywords:

Digital Signal Processing, FPGA, Optimization Techniques, Hardware–Software Co-design, PRISMA Systematic Review.

Abstract

The recent advances in real-time applications in communication, biomedical systems, radar, and intelligent computing applications have boosted the need of high-performance and energy-efficient digital signal processing (DSP) systems. FPGAs have become a powerful solution to this problem because they are able to process data in parallel at a time and can be reconfigured, as well as they have guaranteed timing. The current paper represents a systematic review of optimization strategies and architectural development of FPGA-based DSP implementations that were published after 2020. With the PRISMA model, the relevant selection of journal articles was identified, screened, and further analyzed to provide a clear and systematic review procedure. A list of 62 articles was chosen out of an initial list of 1970 articles retrieved and searched through the SCOPUS database. The analysis of the important design techniques identifies high-level synthesis technique, hardware software co-design technique, pipelining, parallel architecture techniques, and precision optimization techniques such as quantization-aware design technique. The results present major advances in performance, resource consumption, power efficiency and numerical accuracy at a variety of applications, such as artificial intelligence; secure communication and biomedical signal processing. The paper also addresses the issues that exist and also outlines the future research avenues in the area of scalable and efficient FPGA-based DSP systems.

References

1. Diouri, Omar, Ahmed Gaga, Hamid Ouanan, Saloua Senhaji, Sanaa Faquir, and Mohammed Ouazzani Jamil. "Comparison study of hardware architectures performance between FPGA and DSP processors for implementing digital signal processing algorithms: Application of FIR digital filter." Results in Engineering 16 (2022): 100639.

2. Ortega, Eduardo, Agustín Martínez, Antonio Oliva, Fernando Sanz, Oscar Rodríguez, Manuel Prieto, Pablo Parra, Antonio Da Silva, and Sebastián Sánchez. "A digital beamforming receiver architecture implemented on a FPGA for space applications." Microprocessors and Microsystems (2025): 105243.

3. Ayeoribe, Olarewaju Peter. "Efficient Algorithm Design for FM Digital Signal Processors: Challenges and Solutions." SSRN Electronic Journal, 0 [10.2139/ssrn. 5391697] (2025).

4. Galaviz-Aguilar, Jose Alejandro, Cesar Vargas-Rosales, Francisco Falcone, and Carlos Aguilar-Avelar. "Field-Programmable Gate Array (FPGA)-Based Lock-In Amplifier System with Signal Enhancement: A Comprehensive Review on the Design for Advanced Measurement Applications." Sensors 25, no. 2 (2025): 584.

5. Hamouda, Mahmoud, Handy Fortin Blanchette, Kamal Al-Haddad, and Farhat Fnaiech. "An efficient DSP-FPGA-based real-time implementation method of SVM algorithms for an indirect matrix converter." IEEE transactions on industrial electronics 58, no. 11 (2011): 5024-5031.

6. Hegarty, James, John S. Brunhaver, Zachary DeVito, Jonathan Ragan-Kelley, Noy Cohen, Steven Bell, Artem Vasilyev, Mark Horowitz, and Pat Hanrahan. "Darkroom: compiling high-level image processing code into hardware pipelines." ACM Trans. Graph. 33, no. 4 (2014): 144-1.

7. Rajagopalan, Sundararaman, Rengarajan Amirtharajan, Har Narayan Upadhyay, and John Bosco Balaguru Rayappan. "Survey and analysis of hardware cryptographic and steganographic systems on FPGA." Journal of Applied Sciences(Faisalabad) 12, no. 3 (2012): 201-210.

8. Al Kaadi, Robier. "Signal Processing Chainsfor Modulation Systems: Design, Modeling and FPGA Implementation." (2025).

9. Sadeghi, Saman. "Classifying FPGA Technology in Digital Signal Processing: A review." Int. J. Eng. Technol. Sci 2024 (2024): 2289-4152.

10. Sadeghi, S. "A Comprehensive Review of Digital Signal Processing (DSP) Algorithms and Their Applications in Telecommunication and Wireless Communication Systems." International Journal of Engineering & Technology Sciences 2025 (2025): 1-60.

11. Sarkar, Amit. "Digital Signal Processor in FPGA." Department of Microelectronics and VLSI Technology: 40.

12. Roorda, Esther, Seyedramin Rasoulinezhad, Philip HW Leong, and Steven JE Wilton. "FPGA architecture exploration for DNN acceleration." ACM Transactions on Reconfigurable Technology and Systems (TRETS) 15, no. 3 (2022): 1-37.

13. Popoff, Maxime, Romain Michon, Tanguy Risset, Yann Orlarey, and Stéphane Letz. "Towards an FPGA-based compilation flow for ultra-low latency audio signal processing." In SMC-22-Sound and Music Computing. 2022.

14. Chan, Yee Kit, Yung Chong Lee, and Voon Chet Koo. "Design and implementation of synthetic aperture radar (SAR) field-programmable gate array (FPGA)-based processor." Applied Sciences 12, no. 4 (2022): 1808.

15. Boutros, Andrew, and Vaughn Betz. "FPGA architecture: Principles and progression." IEEE Circuits and Systems Magazine 21, no. 2 (2021): 4-29.

16. Al-Zu’bi, Hala, Osama Al-Khaleel, and Ali Shatnawi. "FPGA implementation of data flow graphs for digital signal processing applications." Int. J. Commun. Networks Inf. Secur. 13, no. 1 (2021).

17. Sarkar, Sayantam, and Satish S. Bhairannawar. "Efficient FPGA architecture of optimized Haar wavelet transform for image and video processing applications." Multidimensional Systems and Signal Processing 32, no. 2 (2021): 821-844.

18. Lyu, Congyi, Haoyao Chen, Xin Jiang, Peng Li, and Yunhui Liu. "Real-time object tracking system based on field-programmable gate array and convolution neural network." International Journal of Advanced Robotic Systems 14, no. 1 (2016): 1729881416682705.

19. Gan, Victor M., Yibin Liang, Lianjun Li, Lingjia Liu, and Yang Yi. "A cost-efficient digital esn architecture on fpga for ofdm symbol detection." ACM Journal on Emerging Technologies in Computing Systems (JETC) 17, no. 4 (2021): 1-15.

20. Kumar, Amit, Adesh Kumar, and Aakanksha Devrari. "Hardware chip performance analysis of different FFT architecture." International Journal of Electronics 108, no. 7 (2021): 1124-1140.

21. Ruzindana, Mark W., Mitchell C. Burnett, Jakob W. Kunzler, David M. Marsh, Kayla Lyman, Kyle Evans, Adam Whipple, Karl F. Warnick, and Brian D. Jeffs. "Real-time Signal Processing with FPGAs and GPUs for Wideband Interference-resilient Communications." In 2021 IEEE USNC-URSI Radio Science Meeting (Joint with AP-S Symposium), pp. 1-2. IEEE, 2021.

22. Ruiz-Rosero, Juan, Gustavo Ramirez-Gonzalez, Jennifer M. Williams, Huaping Liu, Rahul Khanna, and Greeshma Pisharody. "Internet of things: A scientometric review." Symmetry 9, no. 12 (2017): 301.

23. Alsuwaiyan, Ali, Aliyu Abubakar Habib, Ali Bello Imoukhuede, Mohamed Osman Omar, Md Al Maruf, Mansour Alqarni, Aiman El-Maleh, Abdulaziz Tabbakh, Muhamad Felemban, and Akramul Azim. "A systematic literature review on vulnerabilities, mitigation techniques, and attacks in field-programmable gate arrays." Arabian Journal for Science and Engineering 50, no. 2 (2025): 611-641.

24. Sun, Qicheng, Mingrui Ao, Xiangqi Dong, Kaichuang Shi, Saifei Gou, Yuxuan Zhu, Zhejia Zhang et al. "A field-programmable gate array based on wafer-scale 2D semiconductor." National Science Review 12, no. 12 (2025): nwaf458.

25. Trimberger, Stephen M., ed. Field-programmable gate array technology. Springer Science & Business Media, 2012.

26. Chen, Donald Donglong, Nele Mentens, Frederik Vercauteren, Sujoy Sinha Roy, Ray CC Cheung, Derek Pao, and Ingrid Verbauwhede. "High-speed polynomial multiplication architecture for ring-LWE and SHE cryptosystems." IEEE Transactions on Circuits and Systems I: Regular Papers 62, no. 1 (2014): 157-166.

27. Tsai, Ching-Chih, Hsu-Chih Huang, and Cheng-Kai Chan. "Parallel elite genetic algorithm and its application to global path planning for autonomous robot navigation." IEEE Transactions on Industrial Electronics 58, no. 10 (2011): 4813-4821.

28. Hasanzadeh, Amin, Chris S. Edrington, Nicholas Stroupe, and Troy Bevis. "Real-time emulation of a high-speed microturbine permanent-magnet synchronous generator using multiplatform hardware-in-the-loop realization." IEEE Transactions on Industrial Electronics 61, no. 6 (2013): 3109-3118.

29. Buccella, Concettina, Carlo Cecati, and Hamed Latafat. "Digital control of power converters—A survey." IEEE Transactions on Industrial Informatics 8, no. 3 (2012): 437-447.

30. Punitha, K., D. Devaraj, and S. Sakthivel. "Artificial neural network based modified incremental conductance algorithm for maximum power point tracking in photovoltaic system under partial shading conditions." Energy 62 (2013): 330-340.

31. Wang, Chao, Xi Li, and Xuehai Zhou. "SODA: Software defined FPGA based accelerators for big data." In 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 884-887. IEEE, 2015.

32. Abdulsamad, Abdulmunem A., and Sándor R. Répás. "Application of FPGA devices in network security: A survey." Electronics 14, no. 19 (2025): 3894.

33. Owen, Anthony, and Mark Sharp. "Implementation of FPGA-Based Medical Image Processing Systems." (2025).

34. Rouhani, Bita Darvish, Ebrahim M. Songhori, Azalia Mirhoseini, and Farinaz Koushanfar. "Ssketch: An automated framework for streaming sketch-based analysis of big data on fpga." In 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, pp. 187-194. IEEE, 2015.

35. Ghasemi, Ehsan, and Paul Chow. "Accelerating apache spark with fpgas." Concurrency and Computation: Practice and Experience 31, no. 2 (2019): e4222.

36. Ghasemi, Ehsan, and Paul Chow. "Accelerating apache spark big data analysis with fpgas." In 2016 Intl IEEE Conferences on Ubiquitous Intelligence & Computing, Advanced and Trusted Computing, Scalable Computing and Communications, Cloud and Big Data Computing, Internet of People, and Smart World Congress (UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld), pp. 737-744. IEEE, 2016.

37. Chiou, Yih-Shyh, Yang-Ke Lin, Chun-Yi Chou, Tsung-Hsuan Chen, You-Sheng Zhang, Yu-Jhih Chen, and Yi-Hsuan Liu. "Localization Algorithms Using Tracking Approaches and Barometric Pressure Sensors in Indoor Environments." IEEE Journal of Indoor and Seamless Positioning and Navigation (2025).

38. Nassim, Moulai Khatir Ahmed, and Ziani Zakarya. "SPARTAN–field programmable gate array implementation for analog waveforms generation by direct digital synthesis." Int J Reconfigurable & Embedded Syst 14, no. 3 (2025): 597-604.

39. Xing, Xing, William Melek, and Wilson Wang. "A Recursive Trigonometric Technique for Direct Digital Frequency Synthesizer Implementation." Electronics 13, no. 23 (2024): 4762.

40. Tchendjeu, Achille Ecladore Tchahou, and Robert Tchitnga. "FPGA‐Based Quadrature Phase Shift Keying Modulator With Carrier Derived From Negative Impedance Converter Equation." Journal of Electrical and Computer Engineering 2025, no. 1 (2025): 4367062.

41. Capligns, Filips, Ruslans Babajans, Darja Cirjulina, Deniss Kolosovs, and Anna Litvinenko. "Frequency-Modulated Antipodal Chaos Shift Keying Chaotic Communication on Field Program Gate Array: Prototype Design and Performance Insights." Applied Sciences (2076-3417) 15, no. 3 (2025).

42. Talal, Nour Gadawe, Rasha Waleed Hamad, and Sahar Lazim Qaddoori. "Efficient implementation of fractional sampling rate conversion (SRC) on FPGA." Diagnostyka 26, no. 3 (2025): 1-9.

43. Gadawe, Noor Talal, Rasha Waleed Hamad, and Sahar Lazim Qaddoori. "Realization of iir digital filter structures for ecg denoising." Journal Européen des Systèmes Automatisés 57, no. 2 (2024): 599.

44. Xu, Bo, Libing Bai, Kai Chen, and Lulu Tian. "A resource saving FPGA implementation approach to fractional Kalman filter." IET Control Theory & Applications 16, no. 13 (2022): 1352-1363.

45. Chen, Ru, Songjie Xiang, Die Yu, Meixuan Li, Mohammad Sh Daoud, Minmin Shao, Abdulilah Mohammad Mayet et al. "An investigation on inner ear operation in sense of hearing: High-speed FPGA-based circuits for digital realization of 2D cochlea modeling." Alexandria Engineering Journal 118 (2025): 371-383.

46. Sajjad, Muhammad, Mohd Zuki Yusoff, and Muhammad Ahmed. "A customized floating-point processor design for FPGA and ASIC based thermal compensation in high-precision sensing." Annals of Emerging Technologies in Computing (AETiC) 5, no. 1 (2021): 40-50.

47. Canese, Lorenzo, Gian Carlo Cardarilli, Riccardo La Cesa, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, and Sergio Spanò. "A Novel Digital Equalizer based on RF Sampling beyond GHz." IEEE Access 12 (2024): 92560-92572.

48. Lee, Hyonik, Se-Young Kim, Sol Kim, and Jong-Won Yu. "A Digital Filter Bank Based Method for Data Reduction in Spaceborne SAR Electronics." IEEE Access 10 (2022): 100911-100921.

49. Portaluppi, Davide, Klaus Pasquinelli, Iris Cusini, and Franco Zappa. "Multi-channel FPGA time-to-digital converter with 10 ps bin and 40 ps FWHM." IEEE Transactions on Instrumentation and Measurement 71 (2022): 1-9.

50. Garzetti, Fabio, Nicola Corna, Nicola Lusardi, and Angelo Geraci. "Time-to-digital converter IP-core for FPGA at state of the art." IEEE Access 9 (2021): 85515-85528.

51. Charlot, Noeloikeau F., Daniel J. Gauthier, and Andrew Pomerance. "High-resolution waveform capture device on a cyclone-v fpga." IEEE Access 9 (2021): 146203-146213.

52. Corda, Stefano, Bram Veenboer, Ahsan Javed Awan, John W. Romein, Roel Jordans, Akash Kumar, Albert-Jan Boonstra, and Henk Corporaal. "Reduced-precision acceleration of radio-astronomical imaging on reconfigurable hardware." IEEE Access 10 (2022): 22819-22843.

53. Donadello, Simone, Elio K. Bertacco, Davide Calonico, and Cecilia Clivati. "Embedded digital phase noise analyzer for optical frequency metrology." IEEE Transactions on Instrumentation and Measurement 72 (2023): 1-12.

54. Huang, Jun, Changkun Li, Jiansheng Dai, Rong Shu, Liang Zhang, and Jianyu Wang. "Real-time and high-speed underwater photon-counting communication based on SPAD and PPM symbol synchronization." IEEE Photonics Journal 13, no. 5 (2021): 1-9.

55. Sharma, Ashok, Yichuang Sun, Oluyomi Simpson, and David Lauder. "Design and implementation of a reconfigurable wideband radio frequency spectrum analyzer with image rejection in the digital domain." IEEE Transactions on Instrumentation and Measurement 70 (2021): 1-16.

56. Porreca, Francesco, Fabio Frustaci, and Raffaele Gravina. "A Codesign Framework for the Development of Next Generation Wearable Computing Systems." Sensors 25, no. 21 (2025): 6624.

57. Węgrzyn, Mariusz, Stepan Voytusik, and Nataliia Gavkalova. "FPGA-based Low Latency Square Root CORDIC Algorithm." Journal of Telecommunications and Information Technology 1 (2025): 21-29.

58. Bosso, Vinicius de Azevedo, Ricardo Masson Nardini, Miguel Angelo De Abreu De Sousa, Sara Dereste Dos Santos, and Ricardo Pires. "An Area-Efficient and Low-Error FPGA-Based Sigmoid Function Approximation." Applied Sciences 15, no. 21 (2025): 11551.

59. Hingu, Chanakya, Xingang Fu, Taofiki Saliyu, Rui Hu, and Ramkrishna Mishan. "Power-Optimized Field-Programmable Gate Array Implementation of Neural Activation Functions Using Continued Fractions for AI/ML Workloads." Electronics 13, no. 24 (2024): 5026.

60. Moroz, Leonid, Volodymyr Samotyy, Paweł Gepner, Mariusz Węgrzyn, and Grzegorz Nowakowski. "Power function algorithms implemented in microcontrollers and FPGAs." Electronics 12, no. 16 (2023): 3399.

61. Kokkinis, Argyris, and Kostas Siozios. "Fast Resource Estimation of FPGA-Based MLP Accelerators for TinyML Applications." Electronics 14, no. 2 (2025): 247.

62. Ahmad, Waqar, Berke Ayrancioglu, and Ilker Hamzaoglu. "Low error efficient approximate adders for FPGAs." IEEE Access 9 (2021): 117232-117243.

63. Paz, Pedro, and Mario Garrido. "Efficient implementation of complex multipliers on FPGAs using DSP slices." Journal of Signal Processing Systems 95, no. 4 (2023): 543-550.

64. Jiang, Yiyue, Andrius Vaicaitis, John Dooley, and Miriam Leeser. "Efficient neural networks on the edge with FPGAs by optimizing an adaptive activation function." Sensors 24, no. 6 (2024): 1829.

65. Lehnert, Alexander, Philipp Holzinger, Simon Pfenning, Ralf Mueller, and Marc Reichenbach. "Most resource efficient matrix vector multiplication on FPGAs." IEEE Access 11 (2023): 3881-3898.

66. Pistellato, Mara, Filippo Bergamasco, Gianluca Bigaglia, Andrea Gasparetto, Andrea Albarelli, Marco Boschetti, and Roberto Passerone. "Quantization-aware nn layers with high-throughput fpga implementation for edge ai." Sensors 23, no. 10 (2023): 4667.

67. Nevarez, Yarib, Andreas Beering, Amir Najafi, Ardalan Najafi, Wanli Yu, Yizhi Chen, Karl-Ludwig Krieger, and Alberto Garcia-Ortiz. "Cnn sensor analytics with hybrid-float6 quantization on low-power embedded FPGAs." IEEE Access 11 (2023): 4852-4868.

68. Campos, Nelson, Eran Edirisinghe, Slava Chesnokov, and Daniel Larkin. "Fast Generation of Custom Floating-Point Spatial Filters on FPGAs." IEEE Access (2024).

69. Cho, Mannhee, and Youngmin Kim. "FPGA-based convolutional neural network accelerator with resource-optimized approximate multiply-accumulate unit." Electronics 10, no. 22 (2021): 2859.

70. Abd El-Maksoud, Ahmed J., Mohamed Ebbed, Ahmed H. Khalil, and Hassan Mostafa. "Power efficient design of high-performance convolutional neural networks hardware accelerator on FPGA: A case study with GoogLeNet." IEEE Access 9 (2021): 151897-151911.

71. Yang, Xu, Chen Zhuang, Wenquan Feng, Zhe Yang, and Qiang Wang. "FPGA implementation of a deep learning acceleration core architecture for image target detection." Applied sciences 13, no. 7 (2023): 4144.

72. Fuketa, Hiroshi, Toshihiro Katashita, Yohei Hori, and Masakazu Hioki. "Multiplication-free lookup-based cnn accelerator using residual vector quantization and its fpga implementation." IEEE Access (2024).

73. Tariq, Omer, and Dongsoo Han. "2D particle filter accelerator for mobile robot indoor localization and pose estimation." IEEE Access 12 (2024): 18473-18487.

74. Sakamoto, Junichi, Daisuke Fujimoto, Riku Anzai, Naoki Yoshida, and Tsutomu Matsumoto. "High-throughput bilinear pairing processor for server-side FPGA applications." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 32, no. 8 (2024): 1498-1511.

75. Hassan, Mohammad, Falah Awwad, Mohamed Atef, and Osman Hasan. "Approximate Computing-Based Processing of MEA Signals on FPGA." Electronics 12, no. 4 (2023): 848.

76. Senthilkumar, V. M., S. Thenmozhi, M. V. Kumudavalli, and U. Yedukondalu. "RETRACTED: Hybrid statistical and recurrent neural network architecture implementation in FPGA device used for severe acute respiratory syndrome coronavirus detector." Journal of Intelligent & Fuzzy Systems 44, no. 6 (2023): 8803-8816.

77. Xing, Xing, and Wilson Wang. "A new recursive trigonometric technique for FPGA-design implementation." Sensors 23, no. 7 (2023): 3683.

78. Gaiceanu, Marian, Silviu Epure, Razvan Constantin Solea, Razvan Buhosu, Ciprian Vlad, and George-Andrei Marin. "Comparison of Direct and Indirect Control Strategies Applied to Active Power Filter Prototypes." Energies 18, no. 23 (2025): 6337.

79. Garrido, Mario, and Pedro Malagón. "The constant multiplier FFT." IEEE Transactions on Circuits and Systems I: Regular Papers 68, no. 1 (2020): 322-335.

80. Song, Zhipeng, Zhixiang Zhao, Hongsen Yu, Jingwu Yang, Xi Zhang, Tengjie Sui, Jianfeng Xu, Siwei Xie, Qiu Huang, and Qiyu Peng. "An 8.8 ps RMS resolution time-to-digital converter implemented in a 60 nm FPGA with real-time temperature correction." Sensors 20, no. 8 (2020): 2172.

81. Nada, Ayman A., and Mona A. Bayoumi. "Development of embedded fuzzy control using reconfigurable FPGA technology." Automatika: časopis za automatiku, mjerenje, elektroniku, računarstvo i komunikacije 65, no. 2 (2024): 609-626.

82. Cuevas-López, Aarón, Elena Pérez-Montoyo, Víctor J. López-Madrona, Santiago Canals, and David Moratal. "Low-power lossless data compression for wireless brain electrophysiology." Sensors 22, no. 10 (2022): 3676.

83. Won, Jun Yeon, Haewook Park, Seungeun Lee, Jeong-Whan Son, Yina Chung, Guen Bae Ko, Kyeong Yun Kim et al. "Development and initial results of a brain PET insert for simultaneous 7-Tesla PET/MRI using an FPGA-only signal digitization method." IEEE Transactions on Medical Imaging 40, no. 6 (2021): 1579-1590.

84. Macias, Rubén, Sergio Bernabé, Daniel Báscones, and Carlos González. "FPGA implementation of a hardware optimized automatic target detection and classification algorithm for hyperspectral image analysis." IEEE Geoscience and Remote Sensing Letters 19 (2022): 1-5.

85. Leon, Vasileios, Ioannis Stamoulias, George Lentaris, Dimitrios Soudris, David Gonzalez-Arjona, Ruben Domingo, David Merodio Codinachs, and Isabelle Conway. "Development and testing on the European space-grade BRAVE FPGAs: Evaluation of NG-large using high-performance DSP benchmarks." IEEE Access 9 (2021): 131877-131892.

86. Wijesinghe, W. A. "An area-efficient DSP-free modular exponentiation architecture for resource-constrained FPGAs." Journal of King Saud University–Engineering Sciences 37, no. 6 (2025): 1-13.

87. Sugier, Jarosław. "Reducing Power of BLAKE3 implementations with dedicated FPGA resources." International Journal of Electronics and Telecommunications 71 (2025).

88. Al-Hussein, Abdul-Basset A., Fadhil Rahma Tahir, and Ghaida A. Al-Suhail. "Design and FPGA Implementation of a Hyper-Chaotic System for Real-Time Secure Image Transmission." Iraqi J. Electr. Electron. Eng 21 (2025): 55-68.

89. Shumran, Alaa, and Abdul-Basset A. Al-Hussein. "Study of Chaotic-based Audio Encryption Algorithms: A Review." Iraqi Journal for Electrical and Electronic Engineering 20, no. 2 (2024): 85-103.

90. Stojilović, Mirjana, Kasper Rasmussen, Francesco Regazzoni, Mehdi B. Tahoori, and Russell Tessier. "A visionary look at the security of reconfigurable cloud computing." Proceedings of the IEEE 111, no. 12 (2023): 1548-1571.

91. Oukaira, Aziz. "Quantum Hardware Devices (QHDs): Opportunities and Challenges." IEEE Access (2025).

92. Eamani, Ramakrishna Reddy, N. Vinodhkumar, Ambe Harrison, and Wulfran Fendzi Mbasso. "FPGA‐Based Design of Ultra‐Efficient Approximate Adders for High‐Fidelity Image Processing: A Logic‐Optimized Approach." Engineering Reports 7, no. 7 (2025): e70262.

93. Nomani, Tuaha, Mujahid Mohsin, Zahid Pervaiz, and Muhammad Shafique. "xUAVs: Towards efficient approximate computing for UAVs—Low power approximate adders with single LUT delay for FPGA-based aerial imaging optimization." IEEE Access 8 (2020): 102982-102996.

94. You, Weijie, and Chang Wu. "RSNN: A software/hardware co-optimized framework for sparse convolutional neural networks on FPGAs." IEEE Access 9 (2020): 949-960.

95. Kawashima, Ichiro, Takashi Morie, and Hakaru Tamukoh. "FPGA implementation of hardware-oriented chaotic Boltzmann machines." IEEE Access 8 (2020): 204360-204377.

96. Papatheofanous, Elissaios Alexios, Dionysios Reisis, and Konstantinos Nikitopoulos. "LDPC hardware acceleration in 5G open radio access network platforms." IEEE Access 9 (2021): 152960-152971.

97. Conti, Giuseppe, Christos Kyrkou, Theocharis Theocharides, Gustavo Hernández-Peñaloza, and David Jiménez. "A novel FPGA-based test-bench framework for SDI stream verification." EURASIP Journal on Image and Video Processing 2020, no. 1 (2020): 31.

98. Hebibi, Amar, Arres Bartil, and Lahcene Ziet. "Comparison of two new methods for implementa BPSK modulator using FPGA." Indonesian Journal of Electrical Engineering and Computer Science 19, no. 2 (2020): 819-827.

99. Maamoun, Mountassar, Adnane Hassani, Samir Dahmani, Hocine Ait Saadi, Ghania Zerari, Noureddine Chabini, and Rachid Beguenane. "Efficient FPGA based architecture for high‐order FIR filtering using simultaneous DSP and LUT reduced utilization." IET Circuits, Devices & Systems 15, no. 5 (2021): 475-484.

100. Arucu, Muhammet, and Teodor Iliev. "Performance Evaluation of FPGA, GPU, and CPU in FIR Filter Implementation for Semiconductor-Based Systems." Journal of Low Power Electronics and Applications 15, no. 3 (2025): 40.

101. Venkateswarlu, Chetti, and Tipparti Anil Kumar. "Low Cost FPGA Implementation of RFIR Filter Based on a Radix-4 Algorithm." International Journal of Intelligent Engineering & Systems 11, no. 5 (2018).

102. Fata, John, Wafa Elmannai, and Khaled Elleithy. "Balancing Performance and Cost—FPGA-Based CNN Accelerators for Edge Computing: Status Quo, Key Challenges, and Prospective Innovations." IEEE Access (2025).

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2026-03-09

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[1]
C. Venkateswarlu and D. T. A. Kumar, “Design And Implementation Of Innovative Methodologies And Architectures For Digital Signal Processing On Fpgas”, IJASIS, pp. 1908–1934, Mar. 2026, doi: 10.29284/m5twa304.

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