EFFICIENT ARCHITECTURE OF COMBINED RADIX DIF ALGORITHM FOR MIMO-OFDM APPLICATION

Authors

  • Pandiaraj P

DOI:

https://doi.org/10.29284/ijasis.2.2.2016.9-13

Keywords:

MIMO-OFDM System, Decimation in Frequency, FFT

Abstract

An efficient design of combined radix-2 Single path Delay Feedback (SDF)-Single path Delay Commutator (SDC)-Decimation In Frequency (DIF) algorithm is proposed in this paper which can be used in Orthogonal Frequency Division Multiplexing (OFDM) with Multiple Input Multiple Output (MIMO) applications. The MIMO-OFDM communication system has tremendous and swift growth in various applications used over last decade, especially wireless and digital communication where adaptability, reconfigurability, less chip size, hardware improvements, and lower power consumption are mandatory requirements during communication. The main aim of this structure is to improve the performance of combined Fast Fourier Transform (FFT) for the MIMO-OFDM system and also to reduce the complexity of the hardware.

References

V. Arunachalam, and A.N.J. Raj, Efficient VLSI Implementation of FFT for Orthogonal Frequency Division Multiplexing Applications, IET Circuits, Devices and Systems, Vol. 8, No. 6, 2014, pp. 526-531.

M. Ayinala, and K.K. Parhi, FFT Architectures for Real-Valued Signals Based on Radix-23 and Radix-24 Algorithms, IEEE Transactions on Circuits and Systems, Vol. 60, No. 9, 2013, pp. 2422-2430.

J. Chen, J. Hu, S. Lee, and G.E. Sobelman, Hardware Efficient Mixed Radix-25/16/9 FFT for LTE Systems, IEEE Transactions on Very Large Scale Integration Systems, Vol. 23, No. 2, 2015, pp. 221-229.

A. Kaivani, and S.B. Ko, Area Efficient Floating Point FFT Butterfly Architectures Based on Multi-operand adders, Electronics Letters, Vol. 51, No.12, 2015, pp. 895-897.

H.F. Luo, Y.J. Liu, and M.D. Shieh, Efficient Memory-Addressing Algorithms for FFT Processor Design, IEEE Transactions on Very Large Scale Integration Systems, Vol. 23, No. 10, 2015, pp. 2162-2171.

S. Qiao, Y. Hei, B. Wu, and Y. Zhou, An Area and Power Efficient FFT processor for UWB Systems, IEEE, 2007, pp. 582-585.

V. Arunachalam, and A.N.J. Raj, Efficient VLSI implementation of FFT for orthogonal frequency division multiplexing applications IET Circuits, Devices & Systems, Vol. 8, No. 6, 2014, pp.526-531.

A. Akshata, D.K. Gopika, and I.Hameem Shanavas, FPGA Implementation of Decimation in Time FFT or Discrete Fourier Transform, JEST-M, Vol. 1, No. 2, 2012, pp. 35-39.

Downloads

Published

2016-12-30

How to Cite

P, P. . (2016). EFFICIENT ARCHITECTURE OF COMBINED RADIX DIF ALGORITHM FOR MIMO-OFDM APPLICATION. INTERNATIONAL JOURNAL OF ADVANCES IN SIGNAL AND IMAGE SCIENCES, 2(2), 9–13. https://doi.org/10.29284/ijasis.2.2.2016.9-13

Issue

Vol. 2 No. 2 (2016)

Section

Articles

License

This work is licensed under a Creative Commons Attribution 4.0 International License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.