Deep Learning-Based Signal and Image Processing Architectures for VLSI and Embedded Systems
DOI:
https://doi.org/10.29284/femmgy30Keywords:
Deep Learning, Image Processing, Embedded Systems, VLSI Architecture, Hardware-Efficient CNNAbstract
Deep learning methods have recorded impressive success in signal and image processing applications, but their use on VLSI and embedded systems has been limited by the very strict requirements of computation, memory, and power consumption. In order to solve these problems, the paper introduces a lightweight deep learning-based architecture that is specifically tailored to perform efficient signal and image processing with the constraints of embedded systems and VLSI systems. The convolutional neural network design proposed uses depthwise separable convolutions with global average pooling to minimize computational costs and memory footprint and maintain effective feature representation. The architecture is tested on an open-access image processing dataset, and its properties are examined with the help of an automated and reproducible framework of evaluation. Computational analysis shows that the proposed model has a relatively small number of multiply-accumulate operations per inference, and memory analysis indicates that the model parameters and the activations between neurons have a small footprint. The architecture is also explored on low-precision representations and significant savings on memory requirements are found that are easily applicable to embedded implementation. The scalability of performance is evaluated by a hypothetical analytical model of performance that is purely compute-based, and shows that both latency and throughput scale almost linearly with computational parallelism at moderate clock speeds. On the whole, the findings reveal that the suggested architecture provides a good compromise among computation efficiency, memory usage, and scalability and is applicable in real-time signal and image processing in VLSI and embedded systems.
References
1. Tan, M. and Le, Q., 2019, May. Efficientnet: Rethinking model scaling for convolutional neural networks. In International conference on machine learning (pp. 6105-6114). PMLR.
2. Li, Y., Hu, J., Wen, Y., Evangelidis, G., Salahi, K., Wang, Y., Tulyakov, S. and Ren, J., 2023. Rethinking vision transformers for mobilenet size and speed. In Proceedings of the IEEE/CVF international conference on computer vision (pp. 16889-16900).
3. Lin, J., Chen, W.M., Lin, Y., Gan, C. and Han, S., 2020. Mcunet: Tiny deep learning on iot devices. Advances in neural information processing systems, 33, pp.11711-11722.
4. Banbury, C., Zhou, C., Fedorov, I., Matas, R., Thakker, U., Gope, D., Janapa Reddi, V., Mattina, M. and Whatmough, P., 2021. Micronets: Neural network architectures for deploying tinyml applications on commodity microcontrollers. Proceedings of machine learning and systems, 3, pp.517-532.
5. Cai, H., Gan, C., Wang, T., Zhang, Z. and Han, S., 2019. Once-for-all: Train one network and specialize it for efficient deployment. arXiv preprint arXiv:1908.09791.
6. Yang, J., Shen, X., Xing, J., Tian, X., Li, H., Deng, B., Huang, J. and Hua, X.S., 2019. Quantization networks. In Proceedings of the IEEE/CVF conference on computer vision and pattern recognition (pp. 7308-7316).
7. Wei L, Ma Z, Yang C, Yao Q. Advances in the neural network quantization: A comprehensive review. Applied Sciences. 2024 Aug 23;14(17):7445.
8. Mehta, S. and Rastegari, M., 2021. Mobilevit: light-weight, general-purpose, and mobile-friendly vision transformer. arXiv preprint arXiv:2110.02178.
9. Ren, H., Anicic, D. and Runkler, T.A., 2021, July. Tinyol: Tinyml with online-learning on microcontrollers. In 2021 international joint conference on neural networks (IJCNN) (pp. 1-8). IEEE.
10. Chen, Y.H., Yang, T.J., Emer, J. and Sze, V., 2019. Eyeriss v2: A flexible accelerator for emerging deep neural networks on mobile devices. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 9(2), pp.292-308.
11. Lin, J., Chen, W.M., Cai, H., Gan, C. and Han, S., 2021. Memory-efficient patch-based inference for tiny deep learning. Advances in Neural Information Processing Systems, 34, pp.2346-2358.
12. Agrawal, A.M. (2022) CIFAR-10 dataset including train and test images. Kaggle. Available at: https://www.kaggle.com/datasets/ayush1220/cifar10/
13. Qin, D., Leichner, C., Delakis, M., Fornoni, M., Luo, S., Yang, F., Wang, W., Banbury, C., Ye, C., Akin, B. and Aggarwal, V., 2024, September. MobileNetV4: Universal models for the mobile ecosystem. In European Conference on Computer Vision (pp. 78-96). Cham: Springer Nature Switzerland.
14. Liu, Z., Hao, Z., Han, K., Tang, Y. and Wang, Y., 2024. Ghostnetv3: Exploring the training strategies for compact models. arXiv preprint arXiv:2404.11202.
15. Gholami, A., Kim, S., Dong, Z., Yao, Z., Mahoney, M.W. and Keutzer, K., 2022. A survey of quantization methods for efficient neural network inference. In Low-power computer vision (pp. 291-326). Chapman and Hall/CRC.
16. Kawakami, H., Watanabe, H., Sugiura, K. and Matsutani, H., 2023. A low-cost neural ODE with depthwise separable convolution for edge domain adaptation on fpgas. IEICE TRANSACTIONS on Information and Systems, 106(7), pp.1186-1197.
17. Ngadiuba, J., Loncar, V., Pierini, M., Summers, S., Di Guglielmo, G., Duarte, J., Harris, P., Rankin, D., Jindariani, S., Liu, M. and Pedro, K., 2020. Compressing deep neural networks on FPGAs to binary and.
Downloads
Published
Issue
Section
License
This work is licensed under a Creative Commons Attribution 4.0 International License.
This work is licensed under a Creative Commons Attribution 4.0 International License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
